soft-core

英 [ˈsɒft kɔː(r)]

美 [ˈsɔːft kɔːr]

adj.  软性色情的; (性描写等)隐晦的，含蓄的

牛津词典

adj.

• 软性色情的；（性描写等）隐晦的，含蓄的
  showing or describing sexual activity without being too detailed or shocking

柯林斯词典

• (性描写)非赤裸裸的，较隐晦的
  Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.

双语例句

• The paper built a soft core processor which named NIOS II in the FPGA by using SOPC technology, and running μ C/ OS-ⅱ operating system on the NIOS II soft-core in order to achieve the scheduling of the system task.
  通过使用SOPC技术，在FPGA内部构建了NIOSⅡ软核处理器，并在NIOSⅡ软核上运行μC/OS-Ⅱ操作系统，从而实现了对系统任务的调度。
• Implementation of Soft-Core Processor and DDFS Based on FPGA
  基于FPGA的软核处理器及DDFS实现
• First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
  第一，运用了在单芯片上实现系统功能的设计思想，采用了高性能的软核处理器（NiosIICPU）和IP复用技术，提高了整个系统的运行速度和进一步改进的灵活性。
• First some algorithms of gray-scale quantifying are analysised and simulated, and then the detailed designs of complex mold sub-module, quantifying sub-module and SDRAM soft-core controller is presented. 4.
  先对灰度量化算法进行了分析和仿真比较，然后详细介绍了复数求模子模块、量化子模块、SDRAM控制器的设计。
• The paper introduces the structural features of the network processor Nios II and customized instructions and design methods for forwarding software of the network processor based on the Nios II soft-core processor and design methods for the DSP processor used for the processing of the video and image data.
  文中介绍了网络处理器NIOSii的结构特点和自定义指令以及基于NIOSii软核处理器的网络处理器转发软件的设计方法和基于视频图像处理的DSP处理器的设计方法。
• SOPC includes soft-core or hard-core CPU 、 memory 、 I/ O and programmable logic resource, which has all the advantage of SOC 、 PLD and FPGA.
  SOPC综合了SOC、PLD和FPGA的优点，集成了硬核或软核CPU、存储器、I/O以及可编程逻辑。
• The hierarchical, modular design idea was used in the system which embeds the Nios II soft-core processor system in FPGA. And the on-chip hardware and software designs are completed.
  整个系统采用层次化、模块化的设计思想，将NIOSii软核处理器系统嵌入到FPGA中，完成片上硬件和软件的设计。
• According to the structure model of data acquisition and processing system connected by Ethernet, the network interface module based on the Nios soft-core system is designed to construct the network data acquisition system.
  为构建网络化的数据采集系统，根据数据采集模块与处理控制模块通过以太网相连接的结构模型，设计了基于Nios软核系统的嵌入式以太网网络接口模块。
• Implementing the synchronization of industrial Ethernet precise clock based on Nios II soft-core
  基于NiosⅡ软核的工业以太网精确时钟同步的实现
• To solute the problem, the idea of kernel hardware design has been put forward. System architecture is divided into soft-core and hardcore. Hardcore will manage application tasks as a coprocessor to improve the real time of system.
  针对实时性问题，提出将内核硬件化设计的思想，将系统的体系结构划分为软核和硬核，硬核作为协处理器管理应用任务，提高系统的实时性，使系统的性能得到明显的提高。